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Jersin Nguetio
Software Developer

Minneapolis, UNITED STATES

9+ years experience

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325€/day

PROPOSE A MISSION

MY EXPERIENCE

January 1970 - September 2019

PROJECT & RESEARCH EXPERIENCE

Data Prefetching: An effective approach to hide memory latency for data-intensive applications
Fall 2018
* Explored impact of software prefetching techniques such as loop unrolling, loop interchange, and software pipelining on performance of dense matrix multiplication kernels
* Implemented One Block Lookahead hardware prefetching scheme in SimpleScalar

Rapids Group-by GPU Implementation on NVIDIA GeForce GTX 1080
Fall 2018
* Developed a hash-based implementation of a group-by operator to achieve a hundredfold increase in performance compared to sequential implementations

Performance Evaluation of PARSEC Multi-threaded Workloads on Multi-core CPUs
Spring 2018
* Evaluated performance of PARSEC benchmarks on Intel® Core™ i7-4790 and AMD A8-7410 APU
* Architectural description, experimental design and methodology, performance analysis, ANOVA test

FPGA-Based Implementation of discrete-time Kalman Filter for UAV mapping of field crops
Spring 2018
* Hardware implementation of FPGA-based design of Kalman filter algorithm on a Zynq-7000 AP SoC
* Employed hardware reuse and oversampling to minimize hardware cost and computational requirements

January 1970 - September 2019

PROFESSIONAL AFFILIATIONS

Member, National Society of Black Engineers 2018 - present
Member, Association for Computing Machinery 2018 - present
Member, IEEE Computer Society 2018 - present

January 1970 - September 2019

LEADERSHIP ACTIVITIES

* President, French Club, Minneapolis Community and Technical College, Fall 2005 - Spring 2006
* Small World Coffee Hour, U of M TC, Fall 2007 – Fall 2008
* Student Mentor, North Africa Summer Leadership Program, ISSS, U of M TC, Summer 2008 & 2009
* Moderator, Cross-cultural Discussion Group, U of M TC, Spring 2010

January 1970 - September 2019

HONORS

* Phi Theta Kappa Honor Society, Minneapolis Community and Technical College
* CRLA Master Tutoring Certificate, Minneapolis Community and Technical College, Spring 2006
* Tony Diggs Excellence Award, University of Minnesota-Twin Cities, Spring 2008
* Undergraduate Research Opportunities (UROP) Award, Spring 2009

University of Minnesota

September 2006 - May 2009

Multimedia Technology Specialist / Microcomputer Technical Support

Multimedia Technology Specialist
May 2007 – May 2009

•  Assisted faculty with the integration of education technologies in classroom activities
•  Designed web sites, videos, graphics, audios, and animations for faculty and staff
•  Provided help desk support related to web development software and web authoring tools  
•  Designed and maintained client and server-side programming functions

Microcomputer Technical Support
Sep 2006 – May 2007

• Provided on-demand research, technology and directional help to students
• Performed troubleshooting of hardware and software on Windows Operating Systems
• Worked on special projects as assigned

Business Brothers Inc.

November 2011 - June 2017

Software Developer

* Implemented enhancements and new features to existing enterprise-grade applications * Coded and automated the generation of complex reports for critical tasks in health care delivery * Collaborated with a team of developers to provide top-notch user interface design and development * Assisted with migration of legacy applications to web interface and platform

Cardiac Rhythm Management, Boston Scientific

May 2018 - August 2018

Design Assurance Engineering Intern

* Performed exploratory testing of next-generation pacemaker
* Evaluated interactions of components of modular pacing systems with an emphasis on communication interference and therapy interference
* Reviewed existing simulated use protocol for system validation testing
* Actively participated in pre-clinical lab experiments, design and quality assurance meetings, social events, and community engagement activities

Intel Corporation

January 2019 - April 2019

Graphics Hardware Engineer

* Executed post-silicon validation plans for legacy and next-generation graphics chipsets * Applied platform level tools and techniques to validate performance requirements and specifications of graphics chipsets * Developed scripts to automate various phases of validation plans * Interfaced with cross-functional teams to debug failures

MY STACK

Languages
C/C++, CSS, HTML, Java, JavaScript, C, C#, C++, CSS3, CUDA, HTML5, Matlab, OOP, Python, SQL, Verilog, XML
Technologies
HTML DOM, Matlab Simulink, RTL
Others
Algorithms
Software testing
Debugging
Embedded and Telecom
DSP, Simulink
Protocols
JSON
Analysis methods and tools
Parallel Programming

MY TESTS

NAME
SCORE
C quiz niveau débutant
8/15
C quiz niveau intermédiaire
9/20

Skills

C/C++CSSHTMLJavaJavaScriptHTML DOM

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